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data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 1 PS20100 wideband pll fm demodulator data sheet 210893 issue 3 apr-11 fig. 1 pin connections ? top view ordering information PS20100c1s1c1 (tubes) PS20100c1s1ct (tape & reel) package 16 lead soic (0.150? body width) - 20c to +80c the PS20100 is a wideband pll fm demodulator, intended for application in satellite tuners and data communication systems. the device contains all elements necessary, with the exception of an external oscillator sustaining network and loop feedback components, to form a complete pll system operating at frequencies up to 800mhz. an afc with window adjust is provided, whose output signal can be used to correct for any frequency drift at the head end local oscillator. features ? single chip pll system for wideband fm demodulation ? simple low component count application ? allows for application of threshold extension ? fully balanced low radiation design ? high operating input sensitivity ? improved vco stability with variations in supply o r temperature ? agc detect and bias adjust ? 75 video output drive with low distortion levels ? dynamic self biasing analog afc ? full esd protection ( normal esd handling procedures should be observed) applications ? satellite receiver systems ? data communications systems
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 2 fig. 2 PS20100 block diagram fig. 3 PS20100 block diagram
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 3 electrical characteristics t amb = -20c to +80c, v cc = +4.5v to +5.5v. the electrical characteristics a re guaranteed by either production test or design. they apply within the specified ambient temperature and supply voltage unless otherwise sta ted. value characteristics min. typ. max. units conditions supply current 36 40 ma operating frequency 300 800 mhz input sensitivity -40 dbm preamp limiting input overload 0 dbm vco sensitivity (df/dv) 25 32 39 mhz/v refer to app lication in fig. 3 vco linearity 25 % refer to application in fig. 3; with 13.5mhz p-p deviation vco supply stability 2.0 mhz/v see note 5 vco temperature stability 20 khz/c see note 5 phase detector gain 0.5 v/rad differential loop filter 0.25 v/rad single ended loop filter loop amplifier input impedance 450 570 700 single ended loop amplifier output impedance 25 single ended loop amplifier open loop gain 38 db single ended loop amplifier gain bandwidth product 240 mhz single ended loop amplifier output swing 1.2 vp-p single ended video drive output impedance 55 75 95 video drive: luminance nonlinearity 1.9 5 % 1k load, see note 3 and 4 - differential gain 0.5 2.5 % 75k load, see note 3 and 4 - differential phase 1.0 3 degree 75k load, see note 3 and 4 - intermodulation -40 db see notes 1, 3 and 4 - signal/noise 66 72 db 1k load, see note 2 and 4 - tilt 0.3 3 % 1k load, see note 3 and 4 - baseline distortion 0.4 2 % 1k load, see note 3 and 4 agc output current 10 400 a maximum load voltage drop 2v agc bias current 0 250 a afc window current 0 400 a 400a gives 1.5v deadband window afc charge pump current 50 a afc leakage current 10 a with charge pump disabled afc output saturation voltage 0.4 v afc output enabled note 1. product of input modulation f 1 at 4.43mhz, 13.5mhz p?p deviation and f 2 at 6mhz p?p deviation, (pal chroma and sound subcarriers). note 2. ratio of output video signal with input mod ulation at 1mhz, 13.5mhz p?p deviation, to output r ms noise in 6mhz bandwidth with no input modulation. note 3. input test signal pre?emphasised video 13.5 mhz p?p deviation. output voltage 600mv pk?pk. note 4. see fig 3 note 5. assuming operating frequency of 479.5mhz se t with v cc @ 5.0v and ambient temperature of +20c. only appli es to application shown in fig. 4. also refer to fig. 10.
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 4 absolute maximum ratings all voltages are referred to v ee at 0v characteristics min. max. units conditions supply voltage -0.3 7 v rf input voltage 2.5 vp-p rf input dc offset -0.3 v cc +0.3 v oscillator dc offset -0.3 v cc +0.3 v video dc offset -0.3 v cc +0.3 v video feedback dc offset -0.3 v cc +0.3 v video output dc offset -0.3 v cc +0.3 v afc pump dc offset -0.3 v cc +0.3 v afc disable dc offset -0.3 v cc +0.3 v afc deadband dc offset -0.3 v cc +0.3 v agc bias dc offset -0.3 v cc +0.3 v agc output dc offset -0.3 v cc +0.3 v storage temperature -55 125 c junction temperature 150 c mp16 package thermal resistance, chip to ambient 111 c/w mp16 package thermal resistance, chip to case 41 c/w power consumption at 5.5v 250 mw esd protection - pins 1 to 15 2 kv mil-std-883 method 3015 class 1 esd protection - pin 16 1.7 kv mil-std-883 method 3015 class 1 fig. 4 standard application circuit
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 5 functional description the PS20100 is a wideband pll fm demodulator, optim ised for application in satellite receiver systems and requiring a minimum external component count. it co ntains all the elements required for construction o f a phase locked loop circuit, with the exception of tuning componen ts for the local oscillator, and an afc detector ci rcuit for generation of error signal to correct for any frequency drift in the outdoor unit local oscillator. a block diagram is contained in figure 2 and the ty pical application in figure 4. the internal pin connections are contained in figur es 7 and 7a in normal applications the second satellite if freq uency of typically 402 or 479.5mhz is fed to the rf preamplifier, which has a working sensitivity of typically -40 db m, depending on application and layout. the preampl ifier contains an rf level detect circuit, which generate s an agc signal that can be used for controlling th e gain of the if amplifier stages, so maintaining a fixed level to t he rf input of the PS20100, for optimum threshold p erformance. the bias point of the agc circuit can be adjusted t o cater for variation in agc line voltage requireme nt and device input power. the typical agc curves are shown in fi g. 10. it is recommended that the device is operate d with an input signal between -30 and -35dbm. this ensures optimum linearity threshold performance, and gives a good safety margin over the typical sensitivity of -40dbm. the output of the preamplifier is fed to the mixer section which is of balanced design for low radiati on. in this stage the rf signal is mixed with the local oscillator frequency , which is generated by an on?board oscillator. the oscillator block uses an external varactor tuned sustaining network and is optimised for high linearity over the normal deviation range. a typical frequency versus voltage character istic for the oscillator is contained in figure 8. the loop output is designed to compensate for first order temperature variation effects; the typical stability is shown i n figure 9. the output of the mixer is then fed to the loop amp lifier around which feedback is applied to determin e loop transfer characteristic. feedback can be applied either in d ifferential or single ended mode; if the appropriat e phase detector gains are assumed in calculating loop filters, both modes should give the same loop response. the loop amplifier drives a 75 output impedance buffer amplifier, which can eithe r be connected to a 75 load or used to drive a high input impedance stage giving g reater linearity and approximately 6db higher demod ulated signal output level. design of pll loop parameters fig. 5 pll loop
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 6 the PS20100 is normally used as a type 1 second ord er loop and can be represented by the above diagram . for such a system the following parameters apply; and = 2 0 n d k k n = where k 0 is the vco gain in radian seconds per volt, k d is the phase detector gain in volts per radian, n is the natural loop bandwidth, is the loop damping factor, r1 is loop amplifier i nput impedance note: k 0 is dependant on sensitivity of vco used. k d = 0.25v/rad single ended, 0.5v/rad differential. f rom these factors the loop 3db bandwidth can be determined fr om the following expression; afc facility the PS20100 contains an analog frequency error dete ct circuit, which generates dc voltage proportional to the integral of frequency error. if the incident rf is high then the afc voltage increases, if low then th e voltage decreases. the afc voltage can then be converted by an adc to be read by the micro controller for frequency fine tuning; if used in an i 2 c system it is recommended the device is used with the ps20500 frequency synthesiser. the voltage corresponding to frequency alignment is arbitrary and user defined. the afc detect circuit contains a deadband centre a round the aligned frequency. the deadband can be ad justed from zero window to approximately 25mhz width assum ing an oscillator df/dv of 15mhz/v. if the incident rf is within this window the afc voltage does not integrate, except b y component leakage. with reference to figure 6; in normal operation the demodulated video is fed to a dual comparator wher e it is compared with two reference voltages, corresponding to the extremes of the deadband, or window. these voltages are variable and set by the window adjust input. the comparators produce two digital outputs corresp onding to voltages above or below the voltage window, or frequency above or below deadband. these digital control signals are used to control a comp limentary current source pump. the current signals are then fed to th e input of an amplifier which is arranged as an int egrator, so integrating the pulses into a dc voltage. if the frequency is correctly aligned both the curr ent source and sink are disabled, therefore the dc output voltage remains constant. there will be a small drift due t o component leakage; the maximum drift can be calcu lated from;
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 7 fig. 6 afc system block diagram fig. 7 PS20100 i/o port internal circuitry
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 8 fig. 7a PS20100 i/o port internal circuitry fig. 8 typical vco frequency vs dc control voltage
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 9 fig.9 PS20100 vco centre frequency uncompensated te mperature stability fig.10 agc output voltage for differing values of a gc bias resistor
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 10 application notes capture range under conditions when there is no rf input signal p resent, the PS20100 may react to spurious radiation from the free running oscillator coupling into the rf inputs . because of the constant phase error between the v co input to the phase detector and the spuriously coupled signa l via the rf input, the phase comparator will drive the control voltage to either the bottom or the top of the rang e. in such a case, the capture range will be asymmetri cal about the vco free running frequency, since any control voltage will only be able to tune the vco in one di rection if the tuning voltage is already at the max or min. this effect can be avoided by driving the rf input differentially or achieving good common mode reject ion to the vco signal. the lock range is independent of the above effects and will be symmetric about the centre of the phase detector s-curve provided the vco is correctly aligned. example loop out of lock tuning voltage =4.3v (maximum) frequency =520mhz (m aximum it is only possible to capture signals below this f requency since the vco is already at its maximum fr equency. testing of capture range should be done with the de vice operating under normal conditions. an input si gnal of between -35dbm to -10dbm is suitable for such a measurement . lock range lock range should be symmetric about the centre of the s-curve. when the oscillator is sitting in the centre of the s-curve, the two video outputs will be at the same dc voltage. rf oscillator design the standard application circuit for the PS20100 is shown in fig.4. the layout of the vco tank should follow normal goo d rf techniques - ie as compact as possible. this w ill minimise parasitics, thus giving improved vco linearity and stability. the pcb layout used for testing purpose is shown in fig. 11. setting up of oscillator the vco should be set up so that the desired input rf frequency is at the centre of the lock range. th is will coincide with the centre of the s-curve and the point at whi ch the afc toggles when set to zero deadband. the easiest way to centralise the vco is to input a n rf carrier which is being modulated by a low freq uency squarewave. the tuning coil(s) should be adjusted u ntil the afc voltage toggles between 0.2v and v cc- 0.7v . the smaller the fm deviation of the squarewave used, the more a ccurate the setting will be. a pre-emphasised video input containing black to wh ite transitions can also be used for this setting, since the dc content in a pre-emphasised video is much less than that in non pre?emphasised video. this is importan t as any dc content in the input waveform will introduce an offset in t he afc transition point. the setting can be confirmed by measuring the dc vo ltage on the two video outputs, the voltages should be the same when the oscillator is centred around the inco ming frequency. this dc measurement must be carried out with an unmodulated carrier of the required frequency. modu lation must not be present, since by definition, th e dc voltages would be changing, thus making accurate measurement difficult
PS20100 data sheet 210893 issue 3 plessey semiconductors ltd. design & technology centre, delta 500, delta busine ss park, great western way, swindon, uk sn5 7xe tel: +44 1793 518000 fax: +44 1793 518030 web: www.plesseysemi.com 11 fig.11 layout of demo board with component location s for further information about this and other produc ts, please visit: www.plesseysemiconductors.com legal notice product information provided by plessey semiconduct ors limited (?plessey?) in this document is believe d to be correct and accurate. plessey reserves the right to change/correct the specificat ions and other data or information relating to prod ucts without notice but plessey accepts no liability for errors that may appear in this docume nt, howsoever occurring, or liability arising from the use or application of any information or data provided herein. neither the supply of such in formation, nor the purchase or use of products conv eys any licence or permission under patent, copyright, trademark or other intellectual property right of plessey or third parties. products sold by plessey are subject to its standar d terms and conditions of sale that are available o n request. no warranty is given that products do not infringe the intellectual property rights of third parties, and furthermore, the use o f products in certain ways or in combination with plessey, or non-plessey furnished equipments/c omponents may infringe intellectual property rights of plessey. the purpose of this document is to provide informat ion only and it may not be used, applied or reprodu ced (in whole or in part) for any purpose nor be taken as a representation relating to the pr oducts in question. no warranty or guarantee expres s or implied is made concerning the capability, performance or suitability of any produ ct, and information concerning possible application s or methods of use is provided for guidance only and not as a recommendation. the user is solely responsible for determining the performa nce and suitability of the product in any application and checking that any specification or data it seeks to rely on has not been superseded. products are intended for normal commercial applica tions. for applications requiring unusual environme ntal requirements, extended temperature range, or high reliability capability ( e.g. military, or medical applications), special pr ocessing/testing/conditions of sale may be available on application to plessey.

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